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Rambus, Inc. today announced that it has developed an R+ DDR4 PHY on the GLOBALFOUNDRIES FX-14™ ASIC platform using the company’s most advanced 14nm Power Plus (LPP) process. As part of a comprehensive suite of memory and SerDes interface offerings for networking and data center applications, Rambus has achieved the first production-ready 3200 Mbps DDR4 PHY available on GLOBALFOUNDRIES power-performance optimized 14nm LPP process. The R+ DDR4 PHY is designed to meet the performance and capacity demands of the next wave of data center and networking markets.
“As we become more reliant on the cloud and the stresses placed on data centers continues to grow, the need for memory offerings that promise faster speeds and higher bandwidth has never been more important,” said Luc Seraphin, senior vice president and general manager of the Rambus Memory and Interfaces division. “Together with GLOBALFOUNDRIES, we have been able to develop the industry’s first DDR4 PHY on a 14nm LPP process running at 3200 Mbps and capable of achieving the performance requirements of next-generation systems.”
“GLOBALFOUNDRIES’ FX-14™ platform, based on our advanced 14nm LPP technology, is designed to support the memory intensive computing tasks in today’s most demanding enterprise applications,” said Kevin O’Buckley, vice president product development GLOBALFOUNDRIES. “At 3200 Mbps, the R+ DDR4/3 PHY delivers the maximum data rate supported by the standard enabling advanced functionality like simultaneous streaming of Ultra HD content. We look forward to continue collaborating with Rambus as we develop a fully-featured suite of memory products designed to ensure the best performance for today’s data centers.”
The Rambus R+ DDR4 PHY (rambus.com/ddrnphys) is DFI 4.0 compatible, providing easy integration, and enables customers to differentiate their offerings by providing industry-leading performance while maintaining full compatibility with industry standard DDR4, and DDR3/3L/3U interfaces. Designed for flexibility, the R+ DDR4 PHY delivers data rates from 800 to 3200 Mbps in multiple memory sub-system options including die down, DIMM, and 3DS. In addition, the PHY supports 16 72-bit interfaces, along with single and multi-rank configurations, allowing the end customer to optimize their design for performance, as well as both area and low power.
About Rambus Memory and Interfaces Division (MID)
The Rambus Memory and Interfaces Division develops products and services that solve the power, performance, and capacity challenges of the mobile, connected device, and cloud computing markets. Rambus enhanced standards-compatible and custom memory and serial link solutions include chips, architectures, memory and chip-to-chip interfaces, DRAM, IP validation tools, and system and IC design services. Developed through our system-aware design methodology, Rambus products deliver improved time-to-market and first-time-right quality.
About Rambus, Inc.
Rambus (rambus.com) creates cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting. Our chips, customizable IP cores, architecture licenses, software, tools, services, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile, consumer and media platforms. At Rambus, we are makers of better.
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