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Rambus to Discuss Advancing Memory Interface Performance at Intel Developer Forum Beijing - Company to demonstrate high-performance, low-power memory technologies
Rambus to Discuss Advancing Memory Interface Performance at Intel Developer Forum Beijing

 

NewswireToday - /newswire/ - Beijing, China, 2011/04/11 - Company to demonstrate high-performance, low-power memory technologies. NASDAQ: RMBS

   
 
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Who: Rambus Inc. (NASDAQ: RMBS)

Where: Intel Developer Forum (IDF) - Booth #G1
China National Convention Center
Beijing, China

When: April 12-13, 2011

Join Rambus, Inc., one of the world’s premier technology licensing companies, at the Intel Developer Forum (IDF) in Beijing. In addition to presenting a session on advancing memory interface performance, Rambus will showcase live demos of innovations from its Terabyte Bandwidth Initiative, DDR3 Memory Interface and Mobile XDR™ memory architecture.

Rambus Presentation
Tuesday, April 12, 2011, 13:00 CST
Advancing Memory Interface Performance through Concurrent Engineering
Presenter: Dr. Chuck Yuan, Director of Engineering, Rambus Inc.

During the session, Dr. Yuan will discuss the trend of memory data rates rising beyond 1 gigabit per second (Gbps), which dramatically increases the level of interface design complexity. To meet the performance needs and cost constraints of next-generation electronic systems, a broad set of design considerations, including silicon, package, and PCB design, must be simultaneously optimized. The session will address the concurrent engineering approach adopted at Rambus to optimize the PHY together with the system to achieve breakthrough performance at reduced cost in industry standard and advanced high-performance memories.

Rambus Demos
Terabyte Bandwidth Initiative
The latest technology advancements of Rambus’ Terabyte Bandwidth Initiative enable unmatched power efficiency and compatibility to single-ended memory architectures, including GDDR5 and DDR3. With the addition of FlexMode™ interface technology, a multi-modal, SoC memory interface PHY, supporting both differential and single-ended signaling, can be implemented in a single SoC package design with no additional pins. This demo will showcase how Rambus’ Terabyte Bandwidth Initiative has achieved a power efficiency of 6 milliwatts per gigabit per second (mW/Gbps) when operating at 20Gbps in a 40nm-process silicon test vehicle.

DDR3 PHY Development Package
This high-performance, low-cost DDR3 memory controller interface solution is tailored for consumer electronics. The solution is the first to demonstrate operation in working silicon at a data rate of 1866 megatransfers per second (MT/s) in a low-cost wire bond package.

Mobile XDR™ Memory Architecture
Mobile XDR memory is the fastest and most power-efficient memory for mobile applications. Capable of achieving data rates of 3.2 to 4.3Gbps at an unprecedented power efficiency of 2.2mW/Gbps, Mobile XDR memory is ideal for next-generation smartphones, netbooks, mobile gaming and mobile multimedia products.

About Rambus Inc.
Founded in 1990, Rambus (rambus.com) is one of the world’s premier technology licensing companies. As a company of inventors, Rambus focuses on the development of technologies that enrich the end-user experience of electronic systems. Its breakthrough innovations and solutions help industry-leading companies bring superior products to market. Rambus licenses both its world-class patent portfolio, as well as its family of leadership and industry-standard solutions. Headquartered in Sunnyvale, California, Rambus has regional offices in North Carolina, Ohio, India, Germany, Japan, Korea, and Taiwan.

 
 
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Written by / Agency / Source: Rambus, Inc.

 
 

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Rambus to Discuss Advancing Memory Interface Performance at Intel Developer Forum Beijing

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Rambus |
Publisher Contact: Linda Ashmore - Rambus.com 
650-947-5411 lashmore[.]rambus.com
 
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