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Santa Clara, CA, United States, 2010/06/01 - Intilop’s TOE offers lowest latency, highest TCP/IP performance and smallest size for FPGA and ASIC designs.
Intilop corporation (formerly intelop) releases new fully integrated FPGA-SOC-Platform with TOE, PCI Express and system peripherals that raise the bar in TOE system integration. Intilop’s TOE offers lowest latency, highest TCP/IP performance and smallest size for FPGA and ASIC designs.
Intilop Corporation, a leading high-end advanced IP developer, customization & electronic engineering design services provider, today announced Xilinx V5 and V6 FPGA based development platforms offering a total system solutions for their TCP offload engine SoC IP. The FPGA embedded development platform integrates various features of TCP/IP protocol in hardware which provide differentiated levels of TCP/IP performance improvement.
Now different TOE features can be incorporated for different type of Network traffic.
The ubiquitous nature of TCP/IP and its need for utilizing the available bandwidth to its maximum is greater than ever, said Kelly Masood. CTO of intilop. Customers can immediately start using this platform for their application software development, saving months of integration/testing time.
This is the first TOE development Platform available that is customizable for so many different types of applications.
The benefits are numerous e.g. increasing the raw throughput or response time of an email or web server, reducing the number of ports in a switch.
All of TCP-connection related tasks, TCP-Payload transfer tasks, TCP-disconnection, TCP-session management overhead which traditionally is performed by TCP/IP software is accomplished by the hardware engines in TOE resulting in an order magnitude performance improvement. It is a new paradigm and new level of integration in networking hardware acceleration.
It can also be customized to meet other requirements e.g. misc. protocol processing and monitoring at multi-Giga-bit line rate, number of simultaneous connections, TCP/IP performance tuning etc. based upon type of network/traffic and application usage, scalable packet FIFO size, scalable size of Session Management table, Session Parameters, scalable size of direct store Packet memories, integrated DDRn/SSRAM controllers (optional), choice of PHY interface - GMII or Serial and more.
“We utilized our expertise in designing highly successful and advanced technology Multi-Giga bit Networking equipment, Enterprise-class IDS/IPS, Network Security appliances employing SOCs also designed by intilop in defining the architecture of this TOE engine,” said K Masood. “We are excited about this new crown jewel and the ability to develop value-added leading edge network acceleration IPs and total solutions for our customers.” said Kevin Moore of Intilop.
Intilop Corporation (intilop.com) is a custom IP developer, SoC/ASIC/FPGA integrator and engineering services provider for Networking, Network Security, Network/storage and Embedded Systems. They offer silicon proven semiconductor IP and services with comprehensive hardware and software experience.