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Written by / Agency / Source: Mentor Graphics Corporation

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Mentor Graphics Certified for TSMC 10nm FinFET Process Technology - Mentor Graphics Corp. announced TSMC has certified Calibre® nmPlatform for 10nm FinFET V0.9 process -
Mentor Graphics Certified for TSMC 10nm FinFET Process Technology


NewswireToday - /newswire/ - Wilsonville, OR, United States, 2015/09/15 - Mentor Graphics Corp. announced TSMC has certified Calibre® nmPlatform for 10nm FinFET V0.9 process - NASDAQ: MENT

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The Mentor® Analog FastSPICE™ circuit verification platform has achieved circuit-level and device-level certification as well, while the Olympus-SoC™ digital design platform is being enhanced to help designers validate and optimize designs more efficiently in TSMC 10nm FinFET. Completion of the remaining certification with 10nm V1.0 process is targeted for Q4, 2015.

Mentor Graphics partnered with TSMC to add a spectrum of new capabilities for their mutual customers’ adoption of 10nm FinFET technology. The new capabilities include advanced double patterning, DRC checks, visualization of TSMC’s full-colored layout methodology, and improved layout productivity with Calibre nmDRC™ and Calibre RealTime products. To improve circuit simulation for FinFET devices and multi-patterned layout, new parasitic models have been implemented in Calibre xACT™ as well as enhanced device parameter extraction in Calibre nmLVS™. For reliability requirements at 10nm, Calibre PERC™ has added P2P resistance and current density (CD) checks that help identify sources of electrical failure. For manufacturability, Mentor Graphics extended the SmartFill feature of Calibre YieldEnhancer to meet TSMC 10nm fill requirements.

“Mentor Graphics and TSMC have been working together to identify and solve the challenges in advanced technologies,” said Joseph Sawicki, vice president and general manager of the Design to Silicon division at Mentor Graphics. “This partnership helps our joint customers release their designs to spec, on time, and deliver more competitive products to the global marketplace.”

“We have a long collaboration history with Mentor Graphics to provide innovative solutions in generations of process nodes,” said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division,“TSMC’s partnership with Mentor Graphics on 10nm FinFET helps our mutual customers take advantage of the power, performance and density benefits for this breakthrough 3D transistor technology.”

The Analog FastSPICE (AFS™) Platform, including AFS Mega, has been certified with various types of reference circuits for 10nm FinFET process technology through TSMC’s SPICE Simulation Tool Certification Program, while device-level certification is ongoing. The Analog FastSPICE Platform provides fast, accurate circuit verification for large-scale nanometer analog, RF, mixed-signal, memory, and custom digital circuits. For embedded SRAM and other array-based circuits, AFS Mega delivers accurate simulation results.

Mentor Graphics and TSMC have also collaborated to add support for full colored design methodology for 10nm in the Olympus-SoC place & route platform. Olympus-SoC has been enhanced to support 10nm floorplanning, placement and routing requirements including multi-site and cross-row constraints-aware placement, pre-colored routing for via1, color-aware min area rules, and incremental design rules, and also to be able to take process variation into consideration.

Mentor Graphics also tuned its products to streamline design and verification flows for multiple process technologies. For example, the SmartFill ECO fill flow helps designers manage last-minute changes. New multi-patterning graph reduction techniques in the Calibre tool’s Multi-Patterning reduce runtimes and debugging effort. Mentor Graphics partnered with TSMC to optimize the usability and speed of Delta-V checks, using the Calibre nmDRC product and the Calibre RealTime tool, to help customers manage the increased check complexity of DRC and double patterning. Designers can improve efficiency and lower overall TAT using TSMC sign-off of the Calibre product decks inside the Calibre nmDRC tool in concert with the Calibre RealTime product. The ongoing collaboration between Mentor Graphics and TSMC ensures that mutual customers have access to EDA tools that are not only optimized for the newest process technologies, but also ready to streamline flows for other leading-edge technologies.

(Mentor Graphics, Mentor, and Calibre are registered trademarks of Mentor Graphics Corporation. Analog FastSPICE, nmDRC, nmLVS, Olympus-SoC, PERC and xACT are trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)

About Mentor Graphics

Mentor Graphics Corporation ( is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year in excess of $1.24 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.

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Mentor Graphics Certified for TSMC 10nm FinFET Process Technology

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Analog FastSPICE (AFS™) | TSMC
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