TSMC and Mentor Graphics jointly developed electrical checks to help improve IP dependability as part of the TSMC9000 qualification process. The companies are also collaborating on an offering that will allow IP partners to access TSMC9000-compliant checking on a per-use basis. This extends the capabilities customers enjoy today with the Calibre PERC product to TSMC’s IP partners, enabling further pre-verification of third-party IP and increasing the coherence between customer and third-party IP reliability verification.
“The goal of TSMC9000 is not only to make IP easy to exchange and re-use within the TSMC Open Innovation Platform® (OIP) environment, but also to ensure dependability, quality and robustness for our customers,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “We have done extensive work with Mentor to define the initial reliability checks for TSMC9000, which will help identify design issues that could increase the risk of failures when circuits are operating in the field.”
This IP quality initiative is built on top of EDA enablement collaboration between TSMC and Mentor Graphics in the past 12 months, automating reliability checks on previously non-checkable rules. With the offering of a new ESD/LUP checking deck from TSMC, early adopters of TSMC 28nm, 20nm, and 16nm technologies have enjoyed this unique reliability solution as the benefits of TSMC9000 are proliferated through the IP space.
Under the program, TSMC will provide IP Alliance partners with Calibre PERC rule decks that perform reliability checks designed to address customers’ advanced circuit verification needs for electrostatic discharge (ESD), electrical overstress (EOS), signals crossing multiple power domains, advanced ERC, and other reliability concerns. The Calibre PERC product was the platform selected for these checks because it provides advanced functionality by enabling checks that combine knowledge of both the physical layout and the netlist, which defines device types and connectivity.
In addition, Mentor will offer additional Calibre PERC service options to IP companies participating in TSMC9000. IP submitted to TSMC can also be provided to Mentor Graphics, where designated customer application engineers run the TSMC9000 checks using in-house datacenter facilities and provide the IP companies with reports indicating pass/fail results, along with pointers to any errors and hotspots.
“Working closely with TSMC, we’ve defined a program that makes advanced reliability checking available to all TSMC OIP IP Alliance partners,” said Joseph Sawicki, vice president and general manager of the Design-to-Silicon division at Mentor Graphics. “This means that our mutual customers will be able to incorporate TSMC9000-qualified IP into their designs with a high confidence that those IP blocks will pass full-chip reliability checks at signoff.”
TSMC will implement these initial checks in their TSMC9000 quality program starting with multi-project shuttles in early 2014. TSMC and Mentor will also be working to expand the number of checks offered to third-party IP providers in future releases tied to various process node updates.
(Mentor Graphics, Mentor, and Calibre are registered trademarks and PERC is a trademark of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)
About Mentor Graphics
Mentor Graphics Corporation (mentor.com) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year of nearly $1,090 million. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.